The invention relates to a semiconductor processing methods and structures, and more particularly to a structure and method for forming metal gates of transistors, especially for transistors in complementary metal oxide semiconductor (CMOS) technology.
Polysilicon gate electrodes have been a preferred material for the manufacture of gate electrode because of the special characteristics of polysilicon, particularly thermal robustness and the greater patterning precision available for etching a polysilicon gate. Many fabrication steps, such as annealing processes, require extremely high processing temperatures and therefore it is important to have a polysilicon gate withstands high temperatures during the fabrication process. Polysilicon gates are capable of withstanding high temperature processing of other elements of transistors such as source and drain regions during dopant drive-ins. In addition, precise edges can be defined on polysilicon gates when etching a layer of polysilicon according to a resist pattern.
However, polysilicon gates have several disadvantages. Polysilicon is not a very good conductor of electricity, a quality which makes polysilicon transistors operate at slower speeds. Furthermore, a polysilicon gate is subject to the formation of a depletion region in operation in which charge carriers are depleted from the gate material above the gate dielectric. This varies from a metal electrode in which charge carriers remain plentiful throughout the electrode. The depletion region has the effect of making the gate dielectric appear thicker in operation than it actually is, such that more charge is needed to turn on the transistor having the polysilicon gate than the transistor having the metal gate. Consequently, in recent years, alternatives for replacing polysilicon gates have been considered.
Metals have long been a preferred material for manufacture of transistor gates since metals are better conductors of electricity, resulting in reduced gate contact resistance and faster device performance. However, manufacturing of metal gates has been previously avoided because of difficulties in fabrication. For one, metal gates are not as thermally robust as polysilicon, responding poorly to high temperatures during processing of transistors or other elements of integrated circuits (ICs). In addition, metal gates cannot withstand the oxidation ambient present during some steps of gate fabrication such as gate sidewall spacer formation and/or gate sidewall oxidation. Furthermore, patterning accuracy required in gate formation is reduced when performing photolithography or other similar techniques on metal surfaces. Planar surfaces, which are a requirement for photolithographic patterning accuracy, are not easily obtainable in metals.
In recent years, there has been greater interest in the fabrication of metal gates, due at least in part to the development of a new approach. In this new approach, a sacrificial polysilicon gate is first formed, which is used during initial high temperature processing of the transistor and which is later replaced by metal gate structure. By this replacement gate process, initial severe transistor processing conditions such as high temperatures need not be modified, and the photolithography benefits associated with polysilicon processing are preserved. Moreover, the initial use of a sacrificial polysilicon gate is benefited by the ability of polysilicon to block ion-implantation to the channel region of the transistor when performing source and drain implants to the transistor.
Metal gates are advantageously used in CMOS transistors including p-type field effect transistors (PFETs) and p-type field effect transistors (NFETs). In such transistors, the channel dopant profile requires a high dopant concentration near the gate dielectric with a sharp drop in concentration elsewhere in order for the gate to have good control over the channel. This requires that the transistors have a heavily doped shallow region under the channel. Such doping is typically obtained by implanting and annealing at a high temperature or by dopant drive-in at a high temperature.
A major challenge in fabricating such transistors is to perform the implant and anneal (or dopant drive-in at high temperature) in a suitable order relative to other steps used to form the transistors. The channel profile has to be established sometime after the sacrificial polysilicon gate is removed but before the metal gate is formed in its place. Adding to the complexity of transistor fabrication, a layer of silicide may be formed over the source and drain regions of the transistor to enhance transistor performance. Suicides of some metals, particularly cobalt and nickel, are intolerant of high temperature processing, thus adding to the difficulties in fabricating such transistors.
These and other difficulties of fabricating metal gates present challenges to be overcome. Improved structures and fabrication methods are needed that can address current fabrication challenges and enhance the overall performance of metal gates.